This invention relates generally to digital data transmission systems and particularly relates to a demodulator for a phase-shift keying, suppressed carrier communication system.
It is conventional practice to transmit digital data by phase-shift keying, that is by digital phase modulation of a carrier. In this case, both the amplitude and the angular frequency of the carrier are constant. However, the relative phase of the carrier is suddenly shifted to represent, for example, two or four possible states of the digital code. Hence, usually one of two possible or one of four possible relative phases are transmitted, corresponding to biphase-shift keying or quadriphase shift keying.
It is well known that for this type of digital phase modulation the carrier is suppressed and the information is carried by a number of sidebands having a separation equal to the modulation rate.
In order to demodulate such a signal the suppressed carrier may be reconstituted. This carrier must be locally generated in phase with the carrier at the transmitter. Presently available techniques for demodulating such a phase modulated carrier fall into two general classes. One type of demodulator is known as a coherent demodulator, while the other uses phase comparison and is sometimes known as a differentially coherent demodulator. However, there are disadvantages to both of these previously known demodulators.
Coherent demodulation involves various methods of reconstituting the carrier from the received suppressed carrier signal. Then the local carrier must be phase locked to that of the transmitter. Once such a phase coherent carrier has been reconstructed the data is recovered by multiplying the incoming suppressed carrier signal by the reconstructed carrier. The desired data is one of the multiplication products.
The difficult and awkward part of the coherent demodulation is the reconstruction of the carrier. This may, for example, be effected by a squaring loop demodulator. Here the incoming signal is frequency doubled which removes the modulation. The resulting signal is then phase locked to a voltage-controlled oscillator and its output is divided by two to demodulate the input signal. However, it is difficult to construct the necessary frequency doubler, the frequency divider and the high frequency phase detector.
Another well known coherent demodulator is a so-called Costas loop. This prior art loop has been discussed in a prior patent to Lanning, U.S. Pat. No. 3,787,775, which is assigned to the assignee of the present application. Reference to the Costas loop is found in column 1, beginning at line 28.
One side of the Costas loop behaves like a phase locked loop except that the error signal has the incorrect sign for one of the input phase states. The sign of the error signal is corrected by the other side of the loop which also provides the data output. It is true that the hardware of the Costas loop is easier to implement than that of the squaring loop demodulator; but on the other hand, a relatively large number of components is required for this demodulator.
The other type of demodulator is the differentially coherent demodulator. It is much simpler than the coherent demodulator. However, its performance is also inferior. In this case the phase detector compares the phase states of two successive bit periods and provides an output when a phase change occurs.
This type of demodulator does not require an oscillator for reconstituting the carrier wave. However, it has two limitations. In the first place, it is useful for only a single data rate corresponding to the duration of the one bit delay. The other limitation is that the differentially coherent demodulator requires a higher ratio of signal-to-noise at its input to provide the same probability of error as the coherent demodulator.
It is accordingly an object of the present invention to provide a new type of demodulator for a biphase or quadriphase phase-shifted signal which can be used for data rates ranging from direct current to say 1/10 of the carrier frequency.
Another object of the present invention is to provide a phase modulator which can readily be implemented by either transistors or by transferred electron devices.